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| BF1205C Dual N-channel dual gate MOS-FET Rev. 01 -- 18 May 2004 Product data sheet 1. Product profile 1.1 General description The BF1205C is a combination of two dual gate MOS-FET amplifiers with shared source and gate 2 leads and an integrated switch. The integrated switch is operated by the gate 1 bias of amplifier b. The source and substrate are interconnected. Internal bias circuits enable DC stabilization and a very good cross-modulation performance during AGC. Integrated diodes between the gates and source protect against excessive input voltage surges. The transistor has a SOT363 micro-miniature plastic package. CAUTION This device is sensitive to electrostatic discharge (ESD). Therefore care should be taken during transport and handling. MSC895 1.2 Features s Two low noise gain controlled amplifiers in a single package; one with a fully integrated bias and one with a partly integrated bias s Internal switch to save external components s Superior cross-modulation performance during AGC s High forward transfer admittance s High forward transfer admittance to input capacitance ratio. 1.3 Applications s Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply voltage x digital and analog television tuners x professional communication equipment. Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 1.4 Quick reference data Table 1: Quick reference data Per MOS-FET unless otherwise specified. Symbol Parameter VDS ID Ptot yfs drain-source voltage drain current (DC) total power dissipation forward transfer admittance Ts 107 C f = 1 MHz amplifier a; ID = 19 mA amplifier b; ID = 13 mA Cig1-ss input capacitance at gate 1 f = 1 MHz amplifier a amplifier b Crss NF Xmod reverse transfer capacitance f = 1 MHz noise figure cross-modulation amplifier a; f = 400 MHz amplifier b; f = 800 MHz input level for k = 1% at 40 dB AGC amplifier a amplifier b Tj [1] [1] Conditions Min 26 28 - Typ 31 33 2.2 2.0 20 1.3 1.4 Max Unit 6 30 180 41 43 2.7 2.5 1.9 2.1 V mA mW mS mS pF pF fF dB dB 100 100 - 105 103 - 150 dBV dBV C junction temperature Ts is the temperature at the soldering point of the source lead. 2. Pinning information Table 2: Pin 1 2 3 4 5 6 Discrete pinning Description gate 1 (a) gate 2 gate 1 (b) drain (b) source drain (a) 1 2 3 g2 s 6 5 4 g1 (a) AMP a d (a) Simplified outline Symbol 001aaa706 g1 (b) AMP b sym033 d (b) 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 2 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 3. Ordering information Table 3: Ordering information Package Name BF1205C Description plastic surface mounted package; 6 leads Version SOT363 Type number 4. Marking Table 4: BF1205C [1] * = p or -: made in Hong Kong. * = t: made in Malaysia. * = W: made in China. Marking Marking code [1] M6* Type number 5. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS ID IG1 IG2 Ptot Tstg Tj [1] Parameter drain-source voltage drain current (DC) gate 1 current gate 2 current total power dissipation storage temperature junction temperature Conditions Min - Max 6 30 10 10 180 +150 150 Unit V mA mA mA mW C C Per MOS-FET Ts 107 C [1] -65 - Ts is the temperature at the soldering point of the source lead. 6. Thermal characteristics Table 6: Symbol Rth(j-s) Thermal characteristics Parameter thermal resistance from junction to soldering point Conditions Typ 240 Unit K/W 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 3 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 250 Ptot (mW) 200 001aaa551 150 100 50 0 0 50 100 150 Ts (C) 200 Fig 1. Power derating curve. 7. Static characteristics Table 7: Static characteristics Tj = 25 C. Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions VG1-S = VG2-S = 0 V; ID = 10 A amplifier a amplifier b V(BR)G1-SS V(BR)G2-SS V(F)S-G1 V(F)S-G2 VG1-S(th) VG2-S(th) IDSX gate 1-source breakdown voltage gate 2-source breakdown voltage forward source-gate 1 voltage forward source-gate 2 voltage gate 1-source threshold voltage gate 2-source threshold voltage drain-source current VGS = VDS = 0 V; IG1-S = 10 mA VGS = VDS = 0 V; IG2-S = 10 mA VG2-S = VDS = 0 V; IS-G1 = 10 mA VG1-S = VDS = 0 V; IS-G2 = 10 mA VDS = 5 V; VG2-S = 4 V; ID = 100 A VDS = 5 V; VG1-S = 5 V; ID = 100 A VG2-S = 4 V; VDS(b) = 5 V; RG1 = 150 k amplifier a; VDS(a) = 5 V amplifier b IG1-S gate1 cut-off current VG2-S = VDS(a) = 0 V amplifier a; VG1-S(a) = 5 V; ID(b) = 0 A amplifier b; VG1-S(b) = 5 V; VDS(b) = 0 V IG2-S gate 2 cut-off current VG2-S = 4 V; VG1-S(a) = VDS(a) = VDS(b) = 0 V; VG1-S(b) = 0 V; 50 50 20 nA nA nA [1] [2] Min Typ Max Unit Per MOS-FET; unless otherwise specified 6 6 6 6 0.5 0.5 0.3 0.4 14 9 10 10 1.5 1.5 1.0 1.0 24 17 V V V V V V V V mA mA [1] [2] RG1 connects gate 1 (b) to VGG = 0 V (see Figure 3). RG1 connects gate 1 (b) to VGG = 5 V (see Figure 3). 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 4 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 20 ID (mA) 16 001aaa552 (1) 12 (2) (3) g1 (a) d (a) 8 (4) g2 s 4 (6) (5) g1 (b) RG1 d (b) 0 0 1 2 3 4 VGG (V) 5 VGG 001aaa553 (1) ID(b); RG1 = 120 k. (2) ID(b); RG1 = 150 k. (3) ID(b); RG1 = 180 k. (4) ID(a); RG1 = 180 k. (5) ID(a); RG1 = 150 k. (6) ID(a); RG1 = 120 k. VGG = 5 V: amplifier a is off; amplifier b is on VGG = 0 V: amplifier a is on; amplifier b is off. Fig 2. Drain currents of MOS-FET a and b as function of VGG. Fig 3. Functional diagram. 8. Dynamic characteristics 8.1 Dynamic characteristics for amplifier a Table 8: Dynamic characteristics for amplifier a [1] Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 19 mA. Symbol yfs Cig1-ss Cig2-ss Coss Crss Gtr Parameter forward transfer admittance input capacitance at gate 1 input capacitance at gate 2 output capacitance reverse transfer capacitance power gain Conditions Tj = 25 C f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz BS = BS(opt); BL = BL(opt) f = 200 MHz; GS = 2 mS; GL = 0.5 mS f = 400 MHz; GS = 2 mS; GL = 1 mS f = 800 MHz; GS = 3.3 mS; GL = 1 mS NF noise figure f = 11 MHz; GS = 20 mS; BS = 0 S f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) 31 26 21 35 30 25 3.0 1.3 1.4 39 34 29 1.9 2.1 dB dB dB dB dB dB Min 26 Typ Max 31 2.2 3.0 0.9 20 41 2.7 Unit mS pF pF pF fF 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 5 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET Table 8: Dynamic characteristics for amplifier a [1] ...continued Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 19 mA. Symbol Xmod Parameter cross-modulation Conditions input level for k = 1%; fw = 50 MHz; funw = 60 MHz at 0 dB AGC at 10 dB AGC at 20 dB AGC at 40 dB AGC [1] [2] For the MOS-FET not in use: VG1-S(b) = 0 V; VDS(b) = 0 V. Measured in Figure 33 test circuit. [2] Min 90 100 Typ Max 90 99 - Unit dBV dBV dBV dBV 105 - 8.1.1 Graphs for amplifier a 001aaa554 (1) 30 ID (mA) 20 (2) (3) 32 ID (mA) 001aaa555 (1) (2) (4) 24 (3) (4) (5) 16 (5) (6) 10 (6) (7) 8 (7) (8) (9) 0 0 0.4 0.8 1.2 1.6 2 VG1-S (V) 0 0 2 4 VDS (V) 6 (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(a) = 5 V; VG1-S(b) = VDS(b) = 0 V; Tj = 25 C. (1) VG1-S(a) = 1.8 V. (2) VG1-S(a) = 1.7 V. (3) VG1-S(a) = 1.6 V. (4) VG1-S(a) = 1.5 V. (5) VG1-S(a) = 1.4 V. (6) VG1-S(a) = 1.3 V. (7) VG1-S(a) = 1.2 V. (8) VG1-S(a) = 1.1 V. (9) VG1-S(a) = 1 V. VG2-S = 4 V; VG1-S(b) = VDS(b) = 0 V; Tj = 25 C. Fig 4. Transfer characteristics; typical values. Fig 5. Output characteristics; typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 6 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 40 yfs (mS) 30 001aaa556 20 ID (a) (mA) 16 001aaa557 (1) (2) 12 20 (3) 8 (4) 10 4 (5) (6) 0 0 8 16 24 ID (mA) 32 0 0 20 40 ID (b) (A) 60 (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. VDS(a) = 5 V; VG1-S(b) = VDS(b) = 0 V; Tj = 25 C. VDS(a) = 5 V; VG2-S = 4 V; VDS(b) = 5 V; VG1-S(b) = 0 V; Tj = 25 C. Fig 6. Forward transfer admittance as a function of drain current; typical values. Fig 7. Drain current as a function of internal G1 current (current in pin drain (b) if MOS-FET (b) is switched off); typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 7 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 20 ID (mA) 16 001aaa558 32 ID (mA) 24 001aaa559 (1) 12 16 8 (2) (3) (4) (5) (6) 8 4 0 0 1 2 3 4 5 Vsupply (V) 0 0 2 4 VG2-S (V) 6 VDS(a) = VDS(b) = Vsupply, VG2-S = 4 V, Tj = 25 C, RG1(b) = 150 k (connected to ground); see Figure 3. (1) VDS(b) = 5 V. (2) VDS(b) = 4.5 V. (3) VDS(b) = 4 V. (4) VDS(b) = 3.5 V. (5) VDS(b) = 3 V. (6) VDS(b) = 2.5 V. VDS(a) = 5 V; VG1-S(b) = 0 V; gate 1 (a) = open; Tj = 25 C. Fig 8. Drain current of amplifier a as a function of supply voltage of a and b amplifier; typical values. Fig 9. Drain current as a function of gate 2 and drain supply voltage; typical values. 120 Vunw (dBV) 110 001aaa560 0 gain reduction (dB) 10 001aaa561 20 100 30 90 40 80 0 10 20 30 40 50 gain reduction (dB) 50 0 1 2 3 VAGC (V) 4 VDS(a) = VDS(b) = 5 V; VG1-S(b) = 0 V; fw = 50 MHz; funw = 60 MHz; Tamb = 25 C; see Figure 33. VDS(a) = VDS(b) = 5 V; VG1-S(b) = 0 V; f = 50 MHz; see Figure 33. Fig 10. Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values. Fig 11. Gain reduction as a function of AGC voltage; typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 8 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 32 ID (mA) 24 001aaa562 102 bis, gis (mS) 10 bis 001aaa564 16 1 8 10-1 gis 0 0 20 40 60 gain reduction (dB) 10-2 10 102 f (MHz) 103 VDS(a) = VDS(b) = 5 V; VG1-S(b) = 0 V; f = 50 MHz; Tamb = 25 C; see Figure 33. VDS(a) = 5 V; VG2-S(a) = 4 V; VDS(b) = VG1-S(b) = 0 V; ID(a) = 19 mA. Fig 12. Drain current as a function of gain reduction; typical values. Fig 13. Input admittance as a function of frequency; typical values. 102 001aaa565 102 103 yrs (mS) 102 -rs 001aaa566 103 -rs (deg) 102 yfs (mS) yfs -fs (deg) 10 -fs 10 yrs 10 10 1 10 102 f (MHz) 1 103 1 10 102 f (MHz) 1 103 VDS(a) = 5 V; VG2-S(a) = 4 V; VDS(b) = VG1-S(b) = 0 V; ID(a) = 19 mA. VDS(a) = 5 V; VG2-S(a) = 4 V; VDS(b) = VG1-S(b) = 0 V; ID(a) = 19 mA. Fig 14. Forward transfer admittance and phase as a function of frequency; typical values. Fig 15. Reverse transfer admittance and phase as a function of frequency: typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 9 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 10 bos, gos (mS) bos 1 001aaa567 10-1 gos 10-2 10 102 f (MHz) 103 VDS(a) = 5 V; VG2-S(a) = 4 V; VDS(b) = VG1-S(b) = 0 V; ID(a) = 19 mA. Fig 16. Output admittance as a function of frequency; typical values. 8.1.2 Scattering parameters for amplifier a Table 9: Scattering parameters for amplifier a VDS(a) = 5 V; VG2-S = 4 V; ID(a) = 19 mA; VDS(b) = 0 V; VG-1S(b) = 0 V; Tamb = 25 C. f (MHz) 50 100 200 300 400 500 600 700 800 900 1000 S11 Magnitude ratio 0.992 0.990 0.982 0.971 0.956 0.938 0.917 0.893 0.867 0.838 0.807 Angle (deg) -3.91 -7.76 S21 Magnitude ratio 3.07 3.06 Angle (deg) S12 Magnitude ratio Angle (deg) 83.61 83.19 78.19 73.75 69.82 66.12 62.11 58.86 58.28 50.64 47.28 S22 Magnitude ratio 0.992 0.992 0.990 0.988 0.985 0.982 0.979 0.975 0.972 0.968 0.966 Angle (deg) -1.47 -2.93 -5.84 -8.71 -11.59 -14.48 -17.31 -20.14 -22.98 -25.85 -28.74 175.56 0.0007 171.18 0.0017 162.42 0.0026 153.79 0.0037 145.22 0.0047 136.78 0.0055 128.46 0.0061 120.20 0.0065 111.98 0.0068 103.90 0.0067 95.875 0.0065 -15.42 3.04 -22.99 3.01 -30.52 2.96 -37.83 2.90 -45.14 2.83 -52.31 2.76 -59.47 2.69 -66.23 2.60 -73.10 2.52 8.1.3 Noise data for amplifier a Table 10: Noise data for amplifier a VDS(a) = 5 V; VG2-S = 4 V; ID(a) = 19 mA; VDS(b) = 0 V; VG-1S(b) = 0 V; Tamb = 25 C. f (MHz) 400 800 Fmin (dB) 1.3 1.4 opt ratio 0.718 0.677 (deg) 16.06 37.59 rn () 0.683 0.681 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 10 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 8.2 Dynamic characteristics for amplifier b Table 11: Dynamic characteristics for amplifier b Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 13 mA. Symbol yfs Cig1-ss Cig2-ss Coss Crss Gtr Parameter forward transfer admittance input capacitance at gate 1 input capacitance at gate 2 output capacitance power gain Conditions Tj = 25 C f = 1 MHz f = 1 MHz f = 1 MHz BS = BS(opt); BL = BL(opt) f = 200 MHz; GS = 2 mS; GL = 0.5 mS f = 400 MHz; GS = 2 mS; GL = 1 mS f = 800 MHz; GS = 3.3 mS; GL = 1 mS NF noise figure f = 11 MHz; GS = 20 mS; BS = 0 S f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) Xmod cross-modulation input level for k = 1%; fw = 50 MHz; funw = 60 MHz at 0 dB AGC at 10 dB AGC at 20 dB AGC at 40 dB AGC [1] [2] For the MOS-FET not in use: VG1-S(a) = 0 V; VDS(a) = 0 V. Measured in Figure 34 test circuit. [2] [1] Min 28 31 28 24 90 100 Typ 33 2.0 3.4 0.85 20 35 32 28 5 1.3 1.4 88 94 103 Max Unit 43 2.5 39 36 32 1.9 2.1 mS pF pF pF fF dB dB dB dB dB dB dBV dBV dBV dBV reverse transfer capacitance f = 1 MHz 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 11 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 8.2.1 Graphs for amplifier b 001aaa568 (1) (4) (2) (3) 30 ID (mA) 20 32 ID (mA) 24 001aaa569 (1) (2) (3) (5) 16 (6) (4) (5) (6) 10 8 (7) (7) 0 0 0.4 0.8 1.2 1.6 2 VG1-S (V) 0 0 2 4 VDS (V) 6 (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(b) = 5 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C. (1) VG1-S(b) = 1.6 V. (2) VG1-S(b) = 1.5 V. (3) VG1-S(b) = 1.4 V. (4) VG1-S(b) = 1.3 V. (5) VG1-S(b) = 1.2 V. (6) VG1-S(b) = 1.1 V. (7) VG1-S(b) = 1 V. VG2-S = 4 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C. Fig 17. Transfer characteristics; typical values. Fig 18. Output characteristics; typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 12 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 100 IG1 (A) 80 001aaa570 (1) (2) 40 Yfs (mS) 30 001aaa571 (1) (2) (3) (3) (4) (4) 60 20 40 (5) (5) 10 20 (6) (6) (7) (7) 0 0 0.4 0.8 1.2 1.6 2 VG1-S (V) 0 0 8 16 24 ID (mA) 32 (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(b) = 5 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C. (1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(b) = 5 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C. Fig 19. Gate 1 current as a function of gate 1 voltage; typical values. Fig 20. Forward transfer admittance as a function of drain current; typical values. 24 ID (mA) 16 001aaa572 16 ID (mA) 12 001aaa573 8 8 4 0 0 10 20 30 40 50 IG1 (A) 0 0 1 2 3 4 VGG (V) 5 VDS(b) = 5 V; VG2-S = 4 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C. VDS(b) = 5 V; VG2-S = 4 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C; RG1(b) = 150 k (connected to VGG); see Figure 3. Fig 21. Drain current as a function of gate 1 current; typical values. Fig 22. Drain current as a function of gate 1 supply voltage (VGG); typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 13 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 24 ID (mA) 16 001aaa574 16 ID (mA) 12 001aaa575 (1) (1) (2) (3) (4) (5) (6) (7) (8) (2) (3) (4) (5) 8 8 4 0 0 2 4 VGG = VDS (V) 6 0 0 2 4 VG2-S (V) 6 (1) RG1(b) = 68 k. (2) RG1(b) = 82 k. (3) RG1(b) = 100 k. (4) RG1(b) = 120 k. (5) RG1(b) = 150 k. (6) RG1(b) = 180 k. (7) RG1(b) = 220 k. (8) RG1(b) = 270 k. VG2-S = 4 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C; RG1(b) is connected to VGG; see Figure 3. (1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. VDS(b) = 5 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C; RG1(b) = 150 k (connected to VGG); see Figure 3. Fig 23. Drain current as a function of gate 1 (VGG), drain supply voltage and value of RG1; typical values. Fig 24. Drain current as a function of gate 2 voltage; typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 14 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 30 IG1 (A) 20 001aaa576 120 Vunw (dBV) 110 001aaa577 (1) (2) (3) (4) 100 (5) 10 90 0 0 2 4 VG2-S (V) 6 80 0 20 40 60 gain reduction (dB) (1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. VDS(b) = 5 V; VDS(a) = VG1-S(a) = 0 V; Tj = 25 C; RG1(b) = 150 k (connected to VGG); see Figure 3. VDS(b) = 5 V; VGG = 5 V; VDS(a) = VG1-S(a) = 0 V; RG1(b) = 150 k (connected to VGG); fw = 50 MHz; funw = 60 MHz; Tamb = 25 C; see Figure 34. Fig 25. Gate 1 current as a function of gate 2 voltage; typical values. Fig 26. Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values. 0 gain reduction (dB) 10 001aaa578 16 ID (mA) 12 001aaa579 20 8 30 4 40 50 0 1 2 3 VAGC (V) 4 0 0 20 40 60 gain reduction (dB) VDS(b) = 5 V; VGG = 5 V; VDS(a) = VG1-S(a) = 0 V; RG1(b) = 150 k (connected to VGG); f = 50 MHz; Tamb = 25 C; see Figure 34. VDS(b) = 5 V; VGG = 5 V; VDS(a) = VG1-S(a) = 0 V; RG1(b) = 150 k (connected to VGG); f = 50 MHz; Tamb = 25 C; see Figure 34. Fig 27. Typical gain reduction as a function of AGC voltage. Fig 28. Drain current as a function of gain reduction; typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 15 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 102 bis, gis (mS) 10 001aaa581 102 001aaa582 102 yfs (mS) bis yfs -fs (deg) 1 gis 10-1 10 -fs 10 10-2 10 102 f (MHz) 103 1 10 102 f (MHz) 1 103 VDS(b) = 5 V; VG2-S = 4 V; VDS(a) = VG1-S(a) = 0 V; ID(b) = 13 mA. VDS(b) = 5 V; VG2-S = 4 V; VDS(a) = VG1-S(a) = 0 V; ID(b) = 13 mA. Fig 29. Input admittance as a function of frequency; typical values. Fig 30. Forward transfer admittance and phase as a function of frequency; typical values. 103 yrs (S) 102 -rs 001aaa583 103 -rs (deg) 102 10 bos, gos (mS) 1 bos 001aaa584 yrs gos 10 10 10-1 1 10 102 f (MHz) 1 103 10-2 10 102 f (MHz) 103 VDS(b) = 5 V; VG2-S = 4 V; VDS(a) = VG1-S(a) = 0 V; ID(b) = 13 mA. VDS(b) = 5 V; VG2-S = 4 V; VDS(a) = VG1-S(a) = 0 V; ID(b) = 13 mA. Fig 31. Reverse transfer admittance and phase as a function of frequency; typical values. Fig 32. Output admittance as a function of frequency; typical values. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 16 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 8.2.2 Scattering parameters for amplifier b Table 12: Scattering parameters for amplifier b VDS(b) = 5 V; VG2-S = 4 V; ID(b) = 13 mA; VDS(a) = 0 V; VG1-S(a) = 0 V; Tamb = 25 C. f (MHz) 50 100 200 300 400 500 600 700 800 900 1000 S11 S21 Angle (deg) S12 Magnitude ratio S22 Angle Magnitude (deg) ratio 84.23 84.91 83.96 82.86 81.88 80.92 80.15 79.68 78.28 78.28 78.15 0.988 0.988 0.986 0.984 0.982 0.978 0.975 0.972 0.968 0.965 0.961 Angle (deg) -1.65 -3.27 -6.50 -9.69 -12.88 -16.07 -19.21 -22.35 -25.52 -28.65 -31.85 Magnitude Angle Magnitude ratio (deg) ratio 0.986 0.982 0.975 0.966 0.955 0.943 0.927 0.909 0.891 0.868 0.846 -3.66 -7.01 3.26 3.24 175.93 0.0008 172.04 0.0015 164.24 0.0029 156.53 0.0042 148.86 0.0055 141.24 0.0066 133.70 0.0076 126.13 0.0086 118.64 0.0094 111.09 0.0100 103.58 0.0107 -13.71 3.22 -20.36 3.19 -27.04 3.15 -33.62 3.10 -40.16 3.05 -46.70 2.99 -52.07 2.92 -59.48 2.84 -65.86 2.77 8.2.3 Noise data for amplifier b Table 13: Noise data for amplifier b VDS(b) = 5 V; VG2-S = 4 V; ID(b) = 13 mA; VDS(a) = 0 V; VG1-S(a) = 0 V; Tamb = 25 C. f (MHz) 400 800 Fmin (dB) 1.3 1.4 opt ratio 0.695 0.674 (deg) 13.11 32.77 rn () 0.694 0.674 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 17 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 9. Test information VAGC VDS(a) 5V 4.7 nF 10 k 4.7 nF L1 2.2 H g1 (a) g2 g1 (b) d (a) S d (b) 4.7 nF RGEN 50 Vi 50 4.7 nF BF1205C RL 50 4.7 nF 50 RG1 L2 2.2 H 4.7 nF VGG 0V VDS(b) 5V 001aaa563 Fig 33. Cross-modulation test set-up for amplifier a. VAGC VDS(a) 5V 4.7 nF 10 k 4.7 nF L1 2.2 H g1 (a) g2 g1 (b) d (a) S d (b) 4.7 nF 50 4.7 nF BF1205C 4.7 nF RGEN 50 Vi 50 RG1 L2 2.2 H 4.7 nF RL 50 VGG 5V VDS(b) 5V 001aaa580 Fig 34. Cross-modulation test set-up for amplifier b. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 18 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 10. Package outline Plastic surface mounted package; 6 leads SOT363 D B E A X y HE vMA 6 5 4 Q pin 1 index A A1 1 e1 e 2 bp 3 wM B detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1 OUTLINE VERSION SOT363 REFERENCES IEC JEDEC EIAJ SC-88 EUROPEAN PROJECTION ISSUE DATE 97-02-28 Fig 35. Package outline. 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 19 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 11. Revision history Table 14: Revision history Release date 20040518 Data sheet status Product data Change notice Order number 9397 750 13005 Supersedes Document ID BF1205C_1 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 20 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 12. Data sheet status Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 13. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 14. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 15. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 13005 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 -- 18 May 2004 21 of 22 Philips Semiconductors BF1205C Dual N-channel dual gate MOS-FET 16. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 8.1.1 8.1.2 8.1.3 8.2 8.2.1 8.2.2 8.2.3 9 10 11 12 13 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics for amplifier a . . . . . . . 5 Graphs for amplifier a . . . . . . . . . . . . . . . . . . . . 6 Scattering parameters for amplifier a . . . . . . . 10 Noise data for amplifier a . . . . . . . . . . . . . . . . 10 Dynamic characteristics for amplifier b . . . . . . 11 Graphs for amplifier b . . . . . . . . . . . . . . . . . . . 12 Scattering parameters for amplifier b . . . . . . . 17 Noise data for amplifier b . . . . . . . . . . . . . . . . 17 Test information . . . . . . . . . . . . . . . . . . . . . . . . 18 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 21 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Contact information . . . . . . . . . . . . . . . . . . . . 21 (c) Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 18 May 2004 Document order number: 9397 750 13005 Published in The Netherlands |
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